Status Information¶
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int ndigo_get_device_type(ndigo_device *device)¶
Return the type of the device.
- Parameters:
device – [in] A pointer to the device.
- Returns:
CRONO_DEVICE_NDIGO5G.
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const char *ndigo_get_device_name(ndigo_device *device)¶
Return the product name of the card.
- Parameters:
device – [in] A pointer to the device.
- Returns:
The name in plain text.
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int ndigo_get_param_info(ndigo_device *device, ndigo_param_info *info)¶
Populate ndigo_param_info.
- Parameters:
device – [in] Pointer to the device.
info – [out] Pointer to a struct to be filled.
- Returns:
A status code.
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int ndigo_get_fast_info(ndigo_device *device, ndigo_fast_info *info)¶
Populate ndigo_fast_info.
The information can be obtained within a few microseconds.
- Parameters:
device – [in] Pointer to the device.
info – [out] Pointer to a struct to be filled.
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int ndigo_get_slow_info(ndigo_device *device, ndigo_slow_info *info)¶
Obtain information that can be obtained within a few milliseconds.
- Parameters:
device – [in] A pointer to the device.
info – [out] A pointer to a structure to be filled.
- Returns:
A status code.
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int ndigo_get_static_info(ndigo_device *device, ndigo_static_info *info)¶
Populate ndigo_static_info.
- Parameters:
device – [in] Pointer to the device.
info – [out] Pointer to a structure in which to store the information
- Returns:
A status code.
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int ndigo_get_buffer_info(ndigo_device *device, ndigo_buffer_info *info)¶
Retrieve buffer information.
- Parameters:
device – [in] Pointer to the device from which to read.
info – [out] Pointer to a struct in which the information will be stored.
- Returns:
A status code.
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int ndigo_get_pcie_info(ndigo_device *device, crono_pcie_info *pcie_info)¶
Obtain PCIe info.
- Parameters:
device – [in] A pointer to the device.
pcie_info – [out] A pointer to a structure to be filled.
- Returns:
A status code.
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int ndigo_clear_pcie_errors(ndigo_device *device, int flags)¶
Clear PCIe errors.
Only useful for PCIe problem debugging.
- Parameters:
- Returns:
A status code.
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struct ndigo_param_info¶
Contains configuration changes.
This structure contains information that change indirectly due to configuration changes.
It is populated using ndigo_get_param_info.
Public Members
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int size¶
The number of bytes occupied by the structure.
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int version¶
Version number of this struct used by the API.
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double bandwidth¶
Bandwidth in Hz.
Currently fixed at 3e9.
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double sample_rate¶
Actual sample rate of currently sampled data.
Depends on ndigo_configuration::adc_mode.
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double sample_period¶
The period one sample in the data represent in picoseconds.
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int board_id¶
The ID the board uses to identify itself in the output data stream.
Takes values between 0 to 255.
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int channels¶
Number of channels in the current mode.
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int channel_mask¶
Mask with a set bit for each enabled input channel.
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int64_t total_buffer¶
Size of the host buffer in bytes.
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int size¶
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struct ndigo_fast_info¶
Contains fast-to-obtain dynamic information.
Struct is populated using ndigo_get_fast_info.
Public Members
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int size¶
The number of bytes occupied by the structure.
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int version¶
Version number of this struct used by the API.
Equals NDIGO_FAST_INFO_VERSION and should be left unchanged.
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int adc_rpm¶
Speed of the ADC fan in rpm.
Reports 0 if no fan is present.
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int fpga_rpm¶
Speed of th FPGA fan in rpm.
Reports 0 if no fan is present.
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int alerts¶
Alert bits from the system monitor.
Bits correspond to the following defines:
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NDIGO_ALERT_FPGA_TEMPERATURE 1¶
FPGA temperature alert (> 85 Celsius).
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NDIGO_ALERT_VCCINT 2¶
Internal FPGA voltage out of range (< 1.01V or > 1.08V).
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NDIGO_ALERT_VCCAUX 4¶
FPGA auxiliary voltage out of range (< 2.375V or > 2.625V).
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NDIGO_ALERT_FPGA_TEMPERATURE_CRITICAL 8¶
FPGA temperature critical (> 125 Celsius).
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NDIGO_ALERT_ADC_TEMPERATURE 16¶
ADC temperature alert (> 90 Celsius).
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NDIGO_ALERT_ADC_TEMPERATURE_CRITICAL 32¶
ADC temperature critical (> 100 Celsius).
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NDIGO_ALERT_FPGA_TEMPERATURE 1¶
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double voltage_aux¶
Auxiliary FPGA voltage, nominal 2.5V.
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double voltage_int¶
Internal FPGA voltage, nominal 1.0V.
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double fpga_temperature¶
In Celsius as measured on die.
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int pcie_pwr_mgmt¶
Organizes power supply of PCIe lanes.
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int pcie_link_width¶
Number of PCIe lanes that the card uses.
Should be 4 for Ndigo5G.
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int pcie_max_payload¶
Maximum size in bytes for one PCIe transaction.
Depends on system configuration.
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int pcie_link_speed¶
Data rate of the PCIe card.
Depends on system configuration.
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int size¶
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struct ndigo_slow_info¶
Contains slow-to-obtain dynamic information.
The data reported in this structure requires milliseconds to be obtained.
The application should only call it in situation where the program flow can cope with an interruption of that magnitude.
Populated by ndigo_get_slow_info.
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struct ndigo_static_info¶
Structure contains static information.
This structure contains information about the board that does not change during run time.
It is provided by ndigo_get_static_info().
Public Members
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int size¶
The number of bytes occupied by the structure.
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int version¶
Version number of this struct used by this API.
Equal NDIGO_STATIC_INFO_VERSION and must be left unchanged.
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int board_id¶
Index of the board as passed to the constructor.
Can also be set via ndigo_set_board_id().
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int driver_revision¶
Driver revision number.
The lower three bytes contain a triple level hierarchy of version numbers. E.g., 0x010103 codes version 1.1.3.
Versioning follows the semver standard.
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int driver_build_revision¶
SVN revision of the driver build.
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int firmware_revision¶
Revision number of the FPGA configuration.
This can be read from a register.
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int board_revision¶
Board revision number.
This can be read from a register.
It is a four bit number that changes when the schematic of the board is changed:
0: Experimental first board Version. Labeled Rev. 1
2: First commercial Version. Labeled Rev. 2
3: Revised version starting in 2011 labeled Rev. 3
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int board_configuration¶
Describes the schematic configuration of the board.
Board revision 0: Always reads 0.
Board revision 2:
If Bit 3 = 0:
Bit 0: ADC resolution (0 = 8-bit, 1 = 10-bit).
Bit 1: TDC-oscillator (0 = oscillator present, 1 = simple trigger).
Bit 2: Input connectors (0 = single ended, 1 = differential).
If Bit 3 = 1 (special version):
0xA: Ndigo1250M-12 single ended with digital trigger.
0x8: Ndigo5G-8 single ended with digital trigger.
Board revision 3:
Bit 2: Input connectors (0 = single ended, 1 = differential).
Other bit patterns [Bits 3…0]:
0010: Ndigo5G-10 2.5u 10
0011: Ndigo5G-8-AQ 2.5u 8
0110: Ndigo5G-10-Diff 560pF 10 DIFF
1000: Ndigo5G-8 560pF 8+
1010: Ndigo1250M-12 2.2uF 12 S DC
1011: Ndigo5G-10 560pF 10
1110: Ndigo5G-S 2.2uF 10 S Infiniband, DIFF
1111: Ndigo5G-R = fADC4/10 560pF 10
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int adc_resolution¶
Number of bits of the ADC.
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double nominal_sample_rate¶
Maximum sample rate in Hz.
Equals 5e9.
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double analog_bandwidth¶
Analog bandwidth in Hz.
Equals 3e9.
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int chip_id¶
Chip ID as read from the 16-bit ADC chip ID register.
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int board_serial¶
Serial number with year and running number in 8.24 format.
8 bits are used to encode the year, 24 bits to encode the serial number.
The number is identical to the one printed on the silvery sticker on the board.
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int flash_serial_low¶
64-bit serial number from the configuration flash chip.
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int flash_serial_high¶
64-bit serial number from the configuration flash chip
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int flash_valid¶
If not 0, the driver found valid calibration data in the flash on the board and is using it.
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ndigo_bool_t dc_coupled¶
False for the standard AC coupled Ndigo5G.
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int subversion_revision¶
Subversion revision ID of the FPGA configuration.
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char calibration_date[NDIGO_CALIBRATION_DATE_LEN]¶
Calibration date.
DIN EN ISO 8601 string YYYY-MM-DD HH:DD describing the time when the card was calibrated.
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char bitstream_date[NDIGO_BITSTREAM_DATE_LEN]¶
Bitstream creation date.
DIN EN ISO 8601 string YYYY-MM-DD HH:DD:SS describing the time when the bitstream was created.
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int fpga_module_revision¶
FPGA module revision number.
It is a 4-bit number that changes when the schematic of the FPGA module is changed.
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int fpga_module_configuration¶
FPGA module configuration.
The same FPGA module can be populated in multiple variants encoded in 6 bits.
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int size¶
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struct ndigo_buffer_info¶
Contains buffer information.
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struct crono_pcie_info¶
Structure containing PCIe information.
Public Members
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uint32_t pwr_mgmt¶
Organizes power supply of PCIe lanes.
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uint32_t link_width¶
Number of PCIe lanes that the card uses.
Should be 1, 2, or 4 for Ndigo5G and 1, 2, 4, or 8 for the Ndigo6G-12. Ideally, should be the respective maximum.
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uint32_t max_payload¶
Maximum size in bytes for one PCIe transaction.
Depends on the system configuration.
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uint32_t link_speed¶
Data rate of the PCIe card.
Depends on the system configuration.
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uint32_t error_status_supported¶
Different from 0 if the PCIe error status is supported for this device.
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uint32_t correctable_error_status¶
Correctable error status flags, directly from the PCIe config register.
Useful for debugging PCIe problems. 0, if no error is present, otherwise one of CRONO_PCIE_* .
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uint32_t uncorrectable_error_status¶
Uncorrectable error status flags, directly from the PCIe config register.
Useful for debugging PCIe problems. 0, if no error is present, otherwise one of CRONO_PCIE_UNC_* .
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uint32_t reserved¶
For future extension.
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uint32_t pwr_mgmt¶